- CPU
- 8-bit turbo 80C52 architecture - 4 cycles/ 1machine cycle - instruction level compatible with Intel 80C52
- 63KB FLASH
- 1KB User EEPROM
- 4KB Internal AUX. RAM
- including 1K User EEPROM
- 256B Internal RAM
- Operating Voltage : 2.7V ~ 3.6V
- Operating Temperature : -40¡É ~ 85¡É
- Operating Frequency
- Max. 48MHz @ VDD = 3.0V
- Max. Programmable 28(32-MLF), 20(24-MLF) I/O Pins
- Push-Pull Control(2 I/O Pins), Open drain, Push-Pull Output - TTL and CMOS compatible logic levels
- Low Voltage Detector (1.6V)
- Internal RING OSC with Calibration function
- 48MHz @ VDD = 3V (±3%)
- Supporting ISP / IAP / MDS
- 24-channel Touch Sensing (32-MLF)
16-channel Touch Sensing (24-MLF)
- Capacitance sensing - Digital sensing - 16bit level resolution
- Three 16-bit Timer/Counters
- 2-Channel I2C (Master/Slave)
- 1-channel UART
- Max. 12-channel 8bit high speed PWM for DIMMING(32-MLF)
Max. 8-channel 8bit high speed PWM for DIMMING(24-MLF)
- 13 Interrupt Sources
- Timer0/1/2, WDT, LVD, I2C, PWM, TS - 4 External Source : both edge/level - Two-level interrupt priority
- Power Down Wake-up Sources
- Reset Sources + 4 External interrupt (both lvevls) - WDT interrupt
- Reset Sources
- On-chip POR (Power-On-Reset) - External reset - LVD (Low Voltage Detector) Reset - WDT (Watchdog Timer) Reset
- Power Consumption
- active current : Max 1mA @3.3V, 2MHz - idle current : Max 0.5mA @3.3V, 2MHz - stop current : Max 110uA @3.3V
- E.S.D. Protection Up to
- 8000V for Touch Sensor Channel Pin - 2000V for Normal I/O Pin
- Latch-up Protection Up to ±200mA
- Package
- 32-MLF - 24-MLF
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