- CPU
- 8-bit turbo 80C52 architecture - 4 cycles/ 1machine cycle - instruction level compatible with Intel 80C52
- 4kB FLASH (Including 1kB User EEPROM)
- 256B Internal RAM
- Operating Voltage : +2.7V to +5.5V
- Operating Frequency : Max. 12MHz
- Max. Programmable 10(24-MLF) I/O Pins
- Push-Pull Control, Open drain, Push-Pull Output - TTL and CMOS compatible logic levels
- Low Voltage Detector (LVD) : +1.6V
- Internal RING OSC with Calibration function
- Max. 12MHz @ VDD = 3.0V - 12MHz (±3%) @+3.0V - 32kHz (±10%) @+1.62V (Low Power Osc)
- 8-channel Touch Sensing(24-MLF)
- Capacitance sensing - Digital sensing - 16bit level resolution
- Supporting ISP / IAP / MDS
- Two 16-bit Timer/Counters
- 26-bit Programmable Watchdog Timer
- 2-Channel I2C (Slave)
- 8 Interrupt Sources
- Timer0/1, WDT, LVD, I2C0/1, TS - 1 External Source : both edge/level - Two-level interrupt priority
- Reset Sources
- On-chip Power-On-Reset (POR) - Low Voltage Detector Reset (LVR) - Watchdog Timer Reset
- Power Down Wake-up Sources
- Reset Sources + 1 External interrupt (both lvevls) - WDT interrupt
- Power Consumption
- Active current : Max 1mA @+3.3V, 2MHz - Idle current : Max 0.5mA @+3.3V, 2MHz - Stop current : Max 1uA @+3.3V (All Clock Off)
- E.S.D. Protection Up to
- 6000V/4000V for Touch Sensor Channel Pin - 2000V for Normal I/O Pin
- Latch-up Protection Up to ±200mA
- Package
- 24-MLF (4mm X 4mm)
|
| |
|